1. Field of the Invention
The present invention relates to a method for producing a protective cover for a device, and in particular to the production of a protective cover for devices containing areas whose function would be impeded by injection-molding housings, such as BAW filters (BAW=bulk acoustic wave), SAW filters (SAW=surface acoustic wave), resonators, sensors, and/or actors. In particular, the present invention relates to a method for producing such a protective cover for the devices on wafer level.
2. Description of Prior Art
Conventionally, devices are produced on and/or in a substrate, wherein after completion of the device the substrate including the device is arranged in an injection-molding housing in a protected manner. In this arrangement, the substrate and the device are completely embedded in the material of the injection-molding housing at least in the area of the device. This procedure is disadvantageous for devices whose function is impeded by this material which, thus require a clearance for proper operability, as is required, for example, in the above-mentioned BAW filters, SAW filters, resonators, sensors, and actors.
An approach known in the prior art to solve these problems with injection-molding housings is to provide a “counter-substrate” in which a corresponding opening is inserted, so that when assembling the device substrate and the housing substrate the cavity is arranged in the area of the device in the device substrate, so that here no further impeding of the device occurs. On wafer level, a wafer is correspondingly produced with a corresponding structure for the devices (system wafer) which is connected to a second wafer (lid wafer) having corresponding pits and holes having been produced for example by etching it, e.g. by a bond procedure. In this manner, the pits of the second wafer become cavities above the sensitive structures of the first wafer, the contact pads of the first wafer being accessible through the holes in the second wafer. Hereby, the sensitive structures are protected.
Alternatively to the procedures just described, a ceramic housing may also be used.
The disadvantage of this solution is that here always a second substrate or a second wafer is to be structured, which requires processing and machining separate from the first wafer. This leads to very time-consuming and expensive overall production and also increases the requirements with respect to the required process accuracy. A further disadvantage of the procedure is that in the connection of the lid wafer to the system wafer pressure and temperature have additionally to be applied, and that the requirements on the surface quality and purity are correspondingly high. A further, even more serious disadvantage is that during this bond process the micro-electromechanical structures are already exposed so that here an additional yield risk exists.
In the post-published German patent application DE 102 00 869 A, an alternative method is described, which describes a sacrificial layer and a cover element formed by a photoresist. The sacrificial layer is formed in an area of the substrate in which the device is formed, in which the cavity is to be produced later. Over the sacrificial layer, a photoresist layer is deposited in which holes are inserted to expose the sacrificial layer in the area of the holes. Then the sacrificial layer is removed by suitable measures, and the holes in the photoresist layer are closed. The disadvantage of this procedure is to be seen in the creation of a non-uniform height profile across the wafer cross-section, i.e. of a non-planar wafer surface, which results from processing the individual protective covers above the devices. This non-uniform height profile across the wafer cross-section makes subsequent process steps more difficult. This applies, in particular, to methods exhibiting particularly good properties on planar surfaces, such as printing processes. Since low-cost printing methods, e.g. screen printing, are often used for applying contact pads in semi-conductor production, the occurrence of a non-uniform height profile across the wafer surface may entail a significant loss in precision in applying contact pads by means of the printing process, it being possible, under certain circumstances, for the low-cost printing processes to no longer have sufficient precision at a high packing density. Another disadvantage of a non-uniform height profile across the wafer cross-section are yield losses, since part of the protective covers to be formed on the wafer are “squashed” due of the printing processes employed. Finally it shall also be noted that due to self-supporting sacrificial structures and self-supporting protective covers on the wafer surface, as are provided in the post-published patent application DE 102 00 869 A, it is not possible to fall short of a defined component size, since otherwise the adherence of the sacrificial structure or of the protective cover to the wafer surface is too small, and the protective cover produced thus does not have sufficient stability.
EP 0 373 360 B1 describes a method for producing an improved insulation in VLSO and ULSI circuits, wherein here also a cavity is to be formed. Here the cavity is also structured by a sacrificial layer removed through one or more openings in a surface of the arrangement. However, a disadvantage to be noted here is that the cavity to be formed has little stability, since the cavity is formed essentially by a cover layer supported by the conductor lines to be insulated. For reasons of sufficient insulation, it is not possible to fall short of a defined cavity size, which, in turn, leads to yield losses due to a “squashing” of the cavities formed when using printing processes in subsequent process steps.